The digital integration method based on using high-speed precision analog-to-digital converters (ADC) has become widely used over the recent years. The paper analyzes the limitations of this method that are caused by the signal properties, ADC sampling rate and noise spectral density of the ADC signal path. This analysis allowed creating digital integrators with accurate synchronization and achieving an integration error of less than 10-5 in the time range from microseconds to tens of seconds. The structure of the integrator is described and its basic parameters are presented. The possibilities of different ADC chips in terms of their applicability to digital integrators are discussed. A comparison with other integrating devices is presented.